| アドレス |
HEX |
Bit |
Bin |
Menu |
アドレス |
HEX |
Bit |
Bin |
Menu |
| 50h |
F |
7 |
1 |
In-Order Queue depth 0=1-level 1=4-level |
51h |
F |
7 |
1 |
CPU DRAM read 0 ws 0=1-level 1=4-level |
| 6 |
1 |
read-around-write 0=disable 1-enable |
6 |
1 |
CPU DRAM write 0 ws 0=disable 1-enable |
| 5 |
1 |
i/o write deferable 0=disable 1=enable |
5 |
1 |
DRAM read request rate 0=3T 1=2T |
| 4 |
1 |
defer retry with HLOCK 0=disable 1=enable |
4 |
1 |
reserved
|
| F |
3 |
1 |
CPU PCI read retry 0=disable 1=enable |
F |
3 |
1 |
reserved
|
| 2 |
1 |
CPU PCI read deferred 0=disable 1=enable |
2 |
1 |
CPU DRAM prefetch depth 0=1-level 1=4-level |
| 1 |
1 |
CPU DRAM read while snoop 0=disable 1=enable |
1 |
1 |
CPU DRAM post-write depth 0=1-level 1=4-level |
| 0 |
1 |
PCI DRAM read while snoop 0=disable 1=enable |
0 |
1 |
concurrent CPU/PCI-master 0=disable 1=enable |
| 64h |
E |
7 |
1 |
0/1 precharge to active 0=2T 1=3T |
65h |
E |
7 |
1 |
0/1 precharge to active 0=2T 1=3T |
| 6 |
1 |
0/1 active to precharge 0=5 1=6T |
6 |
1 |
0/1 active to precharge 0=5 1=6T |
| 5 |
1 |
0/1 CAS latency 00=1T 01=2T 10=3T |
5 |
1 |
0/1 CAS latency 00=1T 01=2T 10=3T |
| 4 |
0 |
(同上)
|
4 |
0 |
(同上)
|
| 6 |
3 |
0 |
0/1 DDR write enable 0=disable 1=enable |
6 |
3 |
0 |
0/1 DDR write enable 0=disable 1=enable |
| 2 |
1 |
0/1 ACTIVE to CMD 0=2T 1=3T |
2 |
1 |
0/1 ACTIVE to CMD 0=2T 1=3T |
| 1 |
1 |
0/1 bank interleave 00=none 01=2-way 10=4way |
1 |
1 |
0/1 bank interleave 00=none 01=2-way 10=4way |
| 0 |
0 |
(同上) |
0 |
0 |
(同上)
|
| 66h |
E |
7 |
1 |
0/1 precharge to active 0=2T 1=3T |
67h |
E |
7 |
1 |
0/1 precharge to active 0=2T 1=3T |
| 6 |
1 |
0/1 active to precharge 0=5 1=6T |
6 |
1 |
0/1 active to precharge 0=5 1=6T |
| 5 |
1 |
0/1 CAS latency 00=1T 01=2T 10=3T |
5 |
1 |
0/1 CAS latency 00=1T 01=2T 10=3T |
| 4 |
0 |
(同上) |
4 |
0 |
(同上) |
| 6 |
3 |
0 |
0/1 DDR write enable 0=disable 1=enable |
6 |
3 |
0 |
0/1 DDR write enable 0=disable 1=enable |
| 2 |
1 |
0/1 ACTIVE to CMD 0=2T 1=3T |
2 |
1 |
0/1 ACTIVE to CMD 0=2T 1=3T |
| 1 |
1 |
0/1 bank interleave 00=none 01=2-way 10=4way |
1 |
1 |
0/1 bank interleave 00=none 01=2-way 10=4way |
| 0 |
0 |
(同上) |
0 |
0 |
(同上) |